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Design Engineer - High Speed, FPGA Design, Signal Integrity

Company: Optello
Location: Poway
Posted on: February 19, 2021

Job Description:

If you are a Design Engineer with experience, please read on!

For nearly 50 years, we have served an integral role in supporting the advancement of the aerospace and defense industries.
We are a pioneer and world leader in high-reliability data communications and control technology.
Aside from being a defense and aerospace innovator, our corporate HQ is adorned by the finest ocean.
We offer our employees a workplace in the heart of one the most desirable places to work and live in the world.
To be frank, we are one of the most exciting, promising Aerospace and Defense companies in North America.

What You Will Be Doing

  • Perform FPGA Design: Architecture, Algorithms, HDL (VHDL and/or Verilog) design/reviews, HDL simulation including testbench creation, Synthesis and Place/route for FPGAs & Constraints, Timing analysis, System Integration and Test
  • High speed signal integrity and high speed power integrity design, simulation and analysis
  • Develop IP Patents, Technical Publications or White Papers. Write specifications and IP procurement documents. Understand FPGA architecture, software tools such as Modelsim for simulation, FPGA tools. Work closely with IP providers to design, spec and review designs to meet component and system level requirements
  • Work with engineers to debug, test, and verify the designs. Support designing and testing components and boards
  • Represent our Engineering Team in technical customer discussions / meetings
    What You Need for this Position
    • Experience with high speed signal integrity and power integrity design and simulation
    • Experience with HDL development skills (VHDL and Verilog) with a thorough understanding of the language both for synthesis and verification
    • Experience with FPGA synthesis, place/route, and static timing analysis along with FPGA architectures
    • Experience and skills in debugging using lab equipment and other tools
    • Experience with Microsemi Libero preferred
    • Strong electrical engineering background for component and board designs
    • Familiarity with revision control (git, cvs, clearcase, etc.)
    • ASIC design knowledge is a plus
    • Ability to work in a team setting effectively
    • Successfully problem solves and manages conflict
    • Has analytical, evaluative, and objective critical thinking skills
      What's In It for You
      • Competitive base salary range $110-140k
      • Medical
      • Dental
      • Vision
      • Bonus
      • 401(k) matching
      • Child Care Reimbursement
      • Health & Fitness Reimbursement
      • Education Reimbursement
      • Relocation Assistance
        So, if you are a Design Engineer with experience, please apply today!

        Email Your Resume In Word To

        Looking forward to receiving your resume through our website and going over the position with you. Clicking apply is the best way to apply, but you may also:

        • Please do NOT change the email subject line in any way. You must keep the JobID: linkedin : JH9- -- in the email subject line for your application to be considered.***
          Jackson Hufferd - Sr. Executive Recruiter - Optello

          Applicants must be authorized to work in the U.S.

          Optello is proud to be an Equal Opportunity Employer

          All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected veteran status, or any other characteristic protected by law.

          Your Right to Work - In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification document form upon hire.

Keywords: Optello, Poway , Design Engineer - High Speed, FPGA Design, Signal Integrity, Engineering , Poway, California

Click here to apply!

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